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    显示项目826-850 / 1386. (共56页)
    << < 29 30 31 32 33 34 35 36 37 38 > >>
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    日期题名作者
    2013 Techniques for Mitigating the Difference Between Cyber Systems and Physical Systems 俞征武; Yu, Chang Wu
    2012 A texture-based feature point detection and matching method 黃雅軒; huang, yea-shuan
    2011 A Texture-Based High Speed Moving Object Detection Method 黃雅軒; huang, yea-shuan
    2010 Thermal Via Planning for Temperature Reduction in 3D ICs 顏金泰; YAN, JIN-TAI
    2008 Thermal-Driven White Space Redistribution for Block-Level Floorplans 顏金泰; YAN, JIN-TAI
    2011 Threshold Jumping and Wrap-Around Scan Techniques toward Efficient Tag Identification in High Density RFID Systems 許慶賢; Hsu, Ching-Hsien
    2008 Tidset-based Parallel FP-tree Algorithm for the Frequent Pattern Mining Problem on PC Clusters 游坤明; Yu, K.M.
    2004 Timing-Constrained Congestion-Driven Global Routing 顏金泰; YAN, JIN-TAI
    2005 Timing-Constrained Construction of Flexibility-Driven Routing Trees 顏金泰; YAN, JIN-TAI
    2005 Timing-Constrained Flexibility-Driven Routing Tree Construction 顏金泰; YAN, JIN-TAI
    2011 Timing-Constrained I/O Buffer Placement for Flip-Chip Designs 顏金泰; YAN, JIN-TAI
    2007 Timing-Constrained Redundant Via Insertion for Yield Optimization 顏金泰; YAN, JIN-TAI
    2013 Timing-Constrained Replacement Using Spare Cells for Design Changes 顏金泰; YAN, JIN-TAI
    2008 Timing-Constrained Yield-driven Redundant Via Insertion 顏金泰; YAN, JIN-TAI
    2006 Timing-Constrained Yield-Driven Wire Sizing for Critical Area Minimization 顏金泰; YAN, JIN-TAI
    2007 Timing-Constrained Yield-Driven Wiring Reconstruction for Critical Area Minimization 顏金泰; YAN, JIN-TAI
    2008 Timing-Driven Multi-Layer Steiner Tree Construction with Obstacle Avoidance 顏金泰; YAN, JIN-TAI
    2006 Timing-Driven Octilinear Steiner Tree Construction Based on Steiner-Point Reassignment 顏金泰; YAN, JIN-TAI
    2008 Timing-Driven Octilinear Steiner Tree Construction Based on Steiner-Point Reassignment and Path Reconstruction 顏金泰; YAN, JIN-TAI
    2005 Timing-Driven Steiner Tree Construction Based on Feasible Assignment of Hidden Steiner Points 顏金泰; YAN, JIN-TAI
    2008 Timing-Driven Steiner Tree Construction for Three-Dimensional ICs 顏金泰; YAN, JIN-TAI
    2005 Timing-Driven Steiner Tree Construction with Buffer Insertion 顏金泰; YAN, JIN-TAI
    2007 Timing-Driven Steiner Tree Construction with Wire Sizing, Buffer Insertion and Obstacle Avoidance 顏金泰; YAN, JIN-TAI
    2012 Top-Down-Based Symmetrical Buffered Clock Routing 顏金泰; YAN, JIN-TAI
    2007 Top-Down-Based Timing-Driven Steiner Tree Construction with Wire Sizing and Buffer Insertion 顏金泰; YAN, JIN-TAI

    显示项目826-850 / 1386. (共56页)
    << < 29 30 31 32 33 34 35 36 37 38 > >>
    每页显示[10|25|50]项目

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