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    Items for Author "謝曜式" 

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    Showing 73 items.

    Collection Date Title Authors Bitstream
    [電子工程學系] 研討會論文 2012 A FAST MQ TABLE BASED MERGING ALGORITHM FOR IMAGE SEGMENTATION 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2011 Wavelet Based Just Noticeable Distortion Model for Transparent Watermarking 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2011 FPGA Implementation of High Performance DCT/IDCT Processor 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2010 A Novel VLSI Linear Array for Discrete Cosine Transform and Its Inverse 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2010 A Novel VLSI Linear Array for 2-D DCT/IDCT 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A High-Efficient Image Scalar Algorithm for LCD Signal Processor 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 無線網絡應用於新世代城鄉安全監控系統 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A High-Efficient and Cost-Effective LCD Signal Processor 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 Cost-Effective Architectures for 2-D Forward and Inverse Discrete Cosine Transform Architecture 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A High-Efficient Line-Based Architecture for 2-D Discrete Wavelet Transform Based on Lifting Scheme Using 9/7 Wavelet Filters 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A Parallel and Pipelined Architecture for 2-D CORDIC-Based Inverse Discrete Cosine Transform 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 An Efficient Line-Based Architecture for 2-D Lifting-Based DECT Using 9/7 Wavelet Filters 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 High-Speed and Low-Power Architectures for Forward and Inverse Discrete Wavelet Transform Using 4-Tap Daubechies Filters 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 VLSI Implementation of Double- Rotation CORDIC Arithmetic 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 The Closed-Loop Control of the Dual-Output Buck-Boost Converters with Structure of Single-Inductor Boost Converter 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 台灣科技產業結構性改變與管理之變遷 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A High-Throughput and Memory-Efficiency 2-D DCT Architecture Based on CORDIC Rotation 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 A Low-Power and High-Efficiency Image Scalar Algorithm for LCD Display Controller 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 無線網絡應用於智慧型車輛安全監控及物流系統 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation, 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2006 High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform Using 5/3 Wavelet Filter 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 Design and Analysis of Pipelined Discrete Wavelet Transform Architectures 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 A Free Jitter Phase Frequency Detector with Negligible Dead Zone 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 Design and Implementation of LCD Monitor/TV Signal Processor 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 A Full Band Low Power Low Phase Noise LC VCO for IEEE 802.11a 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 Area and Throughput Trade-offs in The Design of Pipelined 2-D Discrete Wavelet Transform Architectures 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 FPGA Implementation of Image Scalar for LCD Monitor and TV Controller 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 Hardware Implementation of Fast 3-D Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 Design and Analysis of a High-Speed Sine/Cosine Generator in OFDM System 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 研討會論文 2005 VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 專利 2009 一種快速正弦與餘弦函數產生器 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 A Rate-Distortion-Based Merging Algorithm for Compressed Image Segmentation 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 A Novel Fractional-Discrete-Cosine-Transform-Based Reversible Watermarking for Healthcare Information Management Systems 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 A Unified Algorithm for Subband-Based Discrete Cosine Transform 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 Adaptive Binary Arithmetic
    Coder-Based Image Feature and Segmentation in
    the Compressed Domain    		 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 Difference-Equation-Based Digital Frequency Synthesizer 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 Histogram Modification and Wavelet Transform for High Performance Watermarking 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 An Adaptive Coding Pass Scanning Algorithm for Optimal Rate Control in Biomedical Images 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 Nested Quantization Index Modulation for ReversibleWatermarking and Its Application to Healthcare InformationManagement Systems 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 A New Texture Synthesis Algorithm Based on Wavelet Packet Tree 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2012 Haar-Wavelet-Based Just Noticeable Distortion Model for Transparent Watermark 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2010 An Efficient VLSI Linear Array for DCT/IDCT Using Subband Decomposition Algorithm 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2010 A Novel Linear Array for Discrete Cosine Transform 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2009 The Fast DCT and IDCT Algorithm by Subband Decomposition of signal 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2008 A Superior Algorithm for Resizing Images by using the Subband DCT 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2007 A Fast Algorithm for Resizing Images in the DCT Domain 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2006 Memory-Efficient and Fast Architectures for Forward and Inverse DCT with Multiplierless Operation, 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2006 The Closed-Loop Control for Dual-Output Boost Converter with Single inductor 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2006 VLSI Implementation of a High-Efficient and Cost-Effective LCD Singal Processor, 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2005 Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2005 Friction Compensation for Contour Error of Two-Axis Motion Control System by Using Cross-Couple with Variable-Gain PD Control 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2005 A igh-Speed/Low-Power Architecture for Two-Dimensional Inverse Discrete Wavelet Transform With Multiplierless Operation 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2005 A High Speed and Low Dead Zone PFD with Delay Circuits 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2005 Dual Output Boost Converter Using Single Inductor 謝曜式; Shieh, Yaw-Shih
    [電子工程學系] 期刊論文 2005 A High-Speed /Ultra Low-Power Architecture for Two-Dimensional Discrete Wavelet Transform 謝曜式; Shieh, Yaw-Shih
    [電機工程學系] 研討會論文 2004 Cross-Coupled Control Design of Bi-axis Feed Drive Servomechanism Based on Multitasking Real-Time Kernel 謝曜式; Shieh, Yaw-Shih
    [電機工程學系] 專題研究計畫 1996 變換磁組馬達電路模擬與數位控制器之研究 謝曜式

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