Trap Profile and Bias Temperature Instability of ALD-HfSiON Gate Stacks in Advanced MOSFETs

CHUR > College of Engineering > Department of Microelectronics > Seminar Papers > Item 987654321/33859

Please use this identifier to cite or link to this item: http://chur.chu.edu.tw/handle/987654321/33859

Title:	Trap Profile and Bias Temperature Instability of ALD-HfSiON Gate Stacks in Advanced MOSFETs
Authors:	吳建宏 rossiwu
Contributors:	電子工程學系 Electronics Engineering
Keywords:	ALD MOSFET
Date:	2009
Issue Date:	2014-06-27 02:31:56 (UTC+8)
Abstract:	The use of HfSiON as gate dielectric for advanced CMOS technology is attracting much attention due to good mobility of electrons/holes and significant reduction of gate leakage. However, there are critical reliability concerns as trade-offs to its good ch
Appears in Collections:	[Department of Microelectronics] Seminar Papers

Files in This Item:

File	Description	Size	Format
s_I403_0168.pdf		26Kb	Adobe PDF	114	View/Open