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顯示項目501-550 / 744. (共15頁) << < 6 7 8 9 10 11 12 13 14 15 > >> 每頁顯示[10|25|50]項目

日期	題名	作者
2008	Scheduling for Atomic Broadcast Operation in Heterogeneous Networks with One Port Model	許慶賢; Hsu, Ching-Hsien
2010	Scheduling of Job Combination and Dispatching Strategy for Grid and Cloud System	許慶賢; Hsu, Ching-Hsien
2010	A Secure Communication Mechanism Using NFC Technology	游坤明; Yu, K.M.
2003	A Secure Watermarking Technique for the Object-Oriented Video Encoding System	李建興; Lee, Chang-Hsing
2004	Shape-Based 3D Model Retrieval System based on Elevation Descriptor	石昭玲; Shih, Jau-Ling
2004	A Simulated-Annealing-Based Approach for Timing-Constrained Flexibility-Driven Routing Tree Construction	顏金泰; YAN, JIN-TAI
2008	Simultaneous Assignment of Power Pads and Wires for Reliability-Driven Hierarchical Power Quad-Grids	顏金泰; YAN, JIN-TAI
2011	Simultaneous Escape Routing Based on Routability-Driven Net Ordering	顏金泰; YAN, JIN-TAI
2007	Simultaneous optimization of production planning and inspection planning for flexible manufacturing systems	陳建宏; Chen, Jian-Hung
2004	Simultaneous Wiring and Buffer Block Planning with Optimal Wire-Sizing for Interconnect-Driven Floorplanning	顏金泰; YAN, JIN-TAI
2009	Sleep Scheduling That Minimizes State Transitions for IEEE 802.16e Mobile Subscriber Stations	王俊鑫; Wang, Chun-Hsin
2005	Sliceable Transformation of Non-Slicing Floorplans Based on Vacant Block Insertion in LB-packing Process	顏金泰; YAN, JIN-TAI
2008	A Small-World Routing Protocol for Wireless Sensor Networks	俞征武; Yu, Chang Wu
2008	SoC-Level Fault Injection Methodology in SystemC Design Platform	陳永源; Chen, Yung-Yuan
2009	SoC-Level Risk Assessment Using FMEA Approach in System Design with SystemC	陳永源; Chen, Yung-Yuan
2010	Sorted Compressed Tree: An Improve Method of Frequent Patterns Mining without Support Constraint	曾秋蓉; Tseng, Judy C.R.
2010	SPEED LIMIT SIGN DETECTION AND RECOGNITION	黃雅軒; huang, yea-shuan
2009	Spiral Grid Routing for Load Balance in Wireless Sensor Networks	梁秋國; Liang, Chiu-Kuo
2005	SRBFS: A User-Level Grid File System for Linux	許慶賢; Hsu, Ching-Hsien
2012	Station Decision Problem in Bicycle Ad Hoc Networks	歐陽雯; Ouyang, Wen
2010	Steiner points routing protocol for wireless sensor networks	梁秋國; Liang, Chiu-Kuo
2010	Steiner trees grid routing protocol in wireless sensor networks	梁秋國; Liang, Chiu-Kuo
2007	Study and Demonstration of a Surveillance System Platform on RFID Network	張欽智; CHANG, CHIN-CHIH
2009	Study of Bio-image Reconstruction with Color Adjustable Technology	鄭芳炫; Cheng, Fang Hsuan
2008	A Study on the Transitivity of Social Relationship for Knowledge Sharing	曾秋蓉; Tseng, Judy C.R.
2013	Surf-Badge-Based Target Tracking	連振昌; Lien, Cheng-Chang
2011	Synchronization between Wireless UPnP Video and Audio Players	劉懷仁; Liu, Huai-Jen
2008	System-Bus Fault Injection Framework in SystemC Design Platform	陳永源; Chen, Yung-Yuan
2007	System-Level Fault Injection in SystemC Design Platform	陳永源; Chen, Yung-Yuan
2011	Target Coverage in Wireless Sensor Networks	俞征武; Yu, Chang Wu
2011	The Target Coverage Problem in Directional Sensor Networks with Rotatable Angles	梁秋國; Liang, Chiu-Kuo
2005	The target tracking using the spatial-temporal probability model	連振昌; Lien, Cheng-Chang
2013	Techniques for Mitigating the Difference Between Cyber Systems and Physical Systems	俞征武; Yu, Chang Wu
2011	A Texture-Based High Speed Moving Object Detection Method	黃雅軒; huang, yea-shuan
2010	Thermal Via Planning for Temperature Reduction in 3D ICs	顏金泰; YAN, JIN-TAI
2008	Thermal-Driven White Space Redistribution for Block-Level Floorplans	顏金泰; YAN, JIN-TAI
2008	Tidset-based Parallel FP-tree Algorithm for the Frequent Pattern Mining Problem on PC Clusters	游坤明; Yu, K.M.
2004	Timing-Constrained Congestion-Driven Global Routing	顏金泰; YAN, JIN-TAI
2011	Timing-Constrained I/O Buffer Placement for Flip-Chip Designs	顏金泰; YAN, JIN-TAI
2007	Timing-Constrained Redundant Via Insertion for Yield Optimization	顏金泰; YAN, JIN-TAI
2013	Timing-Constrained Replacement Using Spare Cells for Design Changes	顏金泰; YAN, JIN-TAI
2008	Timing-Constrained Yield-driven Redundant Via Insertion	顏金泰; YAN, JIN-TAI
2006	Timing-Constrained Yield-Driven Wire Sizing for Critical Area Minimization	顏金泰; YAN, JIN-TAI
2007	Timing-Constrained Yield-Driven Wiring Reconstruction for Critical Area Minimization	顏金泰; YAN, JIN-TAI
2008	Timing-Driven Multi-Layer Steiner Tree Construction with Obstacle Avoidance	顏金泰; YAN, JIN-TAI
2006	Timing-Driven Octilinear Steiner Tree Construction Based on Steiner-Point Reassignment	顏金泰; YAN, JIN-TAI
2005	Timing-Driven Steiner Tree Construction Based on Feasible Assignment of Hidden Steiner Points	顏金泰; YAN, JIN-TAI
2008	Timing-Driven Steiner Tree Construction for Three-Dimensional ICs	顏金泰; YAN, JIN-TAI
2005	Timing-Driven Steiner Tree Construction with Buffer Insertion	顏金泰; YAN, JIN-TAI
2007	Timing-Driven Steiner Tree Construction with Wire Sizing, Buffer Insertion and Obstacle Avoidance	顏金泰; YAN, JIN-TAI

顯示項目501-550 / 744. (共15頁) << < 6 7 8 9 10 11 12 13 14 15 > >> 每頁顯示[10|25|50]項目