Chung-Hua University Repository:Item 987654321/33553
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    Please use this identifier to cite or link to this item: http://chur.chu.edu.tw/handle/987654321/33553


    Title: VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN
    Authors: 謝曜式
    Shieh, Yaw-Shih
    Contributors: 電子工程學系
    Electronics Engineering
    Date: 2005
    Issue Date: 2014-06-27 02:25:35 (UTC+8)
    Appears in Collections:[Department of Microelectronics] Seminar Papers

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