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顯示項目6501-6525 / 14866. (共595頁) << < 256 257 258 259 260 261 262 263 264 265 > >> 每頁顯示[10|25|50]項目

日期	題名	作者
2006	VLSI Implementation of a High-Efficient and Cost-Effective LCD Singal Processor,	謝曜式; Shieh, Yaw-Shih
2006	VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor	謝曜式; Shieh, Yaw-Shih
2006	VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor	宋志雲; Sung, Tze-Yun
2005	VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFF Processor for Wireless LAN	林國珍; Lin, Kuo-Jen
2005	VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN	宋志雲; Sung, Tze-Yun
2005	VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN	謝曜式; Shieh, Yaw-Shih
2006	VLSI Implementation of CORDIC-Based Geometry Rotation for High-Speed 3-D Computer Graphic Systems	宋志雲; Sung, Tze-Yun
2008	VLSI Implementation of Discrete Wavelet Transform with Lifting Scheme	宋志雲; Sung, Tze-Yun
2006	VLSI Implementation of Double- Rotation CORDIC Arithmetic	謝曜式; Shieh, Yaw-Shih
2006	VLSI Implementation of Double- Rotation CORDIC Arithmetic (DRCA)	宋志雲; Sung, Tze-Yun
2006	VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors	宋志雲; Sung, Tze-Yun
2006	VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors	謝曜式; Shieh, Yaw-Shih
2007	VLSI Implementation of High-Performance CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphic Systems	宋志雲; Sung, Tze-Yun
2013	VLSI IMPLEMENTATION OF LOW-POWER AND HIGH-SFDR DIGITAL FREQUENCY SYNTHESIZER FOR UNDERWATER INSTRUMENTS AND NETWORK SYSTEMS	宋志雲; Sung, Tze-Yun
2013	VLSI IMPLEMENTATION OF LOW-POWER AND HIGH-SFDR DIGITAL FREQUENCY SYNTHESIZER FOR UNDERWATER INSTRUMENTS AND NETWORK SYSTEMS	莊英慎; Juang, Ying-Shen
2006	VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors	謝曜式; Shieh, Yaw-Shih
2006	VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors	宋志雲; Sung, Tze-Yun
2005	VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion	謝曜式; Shieh, Yaw-Shih
2005	VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion	宋志雲; Sung, Tze-Yun
2005	VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion	林國珍; Lin, Kuo-Jen
2009	VLSI Reconfigurable Architecture for 9/7-5/3 Lifting-Based Discrete Wavelet Transform	宋志雲; Sung, Tze-Yun
2009	Vocational professional certification learning cognitive assessment evaluation based on rule-space and ontology	張文智; Chang, Wen-Chih
2005	VPython 在數學教育上的應用	徐愛鳳; Hsu, Ai-Feng
2007	Wafer Level MEMS Vertical Probe Card Design	林君明; Lin, Jium-Ming
2008	Wafer Level Test Vertical Probe Design	林君明; Lin, Jium-Ming

顯示項目6501-6525 / 14866. (共595頁) << < 256 257 258 259 260 261 262 263 264 265 > >> 每頁顯示[10|25|50]項目